Reconfigurabile Computing Systems (RCS)

English track of "Sisteme Reconfigurabile de Calcul"


COURSE:  Monday,  room B312  17 - 18:40
  lecture notes and resources  (password will be announced in the class )
Instructors: Radu DOGARU (course) and Ioana DOGARU  (lab.)

APPLICATIONS (LAB) Mondays (according to ETTI's schedule (orar)) 

Labs starting with week 1 - 6 works (L1-week 1,2)(L2 - week 3,4)(L3- week 5,6)(L4 - week 7,8) (L5 - week 9,11), L6 (week 12,13)
Week 10 - NO LAB (Easter holiday).
It is highly recommended to have a look on the Lab material before attending the session (more details regarding lab activities in the lab).
Room (lab.) , Instructor: Ioana DOGARU
Last week (14) may be used for people who did not attend (but only for good and provable reasons) one of the labs.
Graduation condition: At least 20 points (of all 40) in the lab (so, attending at least 3-4 labs with good results in the written test at the end of lab.)

contact:  natural computing lab


Lab: 40 points (6 points max. from the written given after each lab - minute 75 to 100 of each session).
Course: 60 points (in 2 or 3 small exams (verificare) as commonly agreed - proposal in the resources page)

References (Romanian)
[1] I. Dogaru, R. Dogaru - Sisteme Reconfigurabile de Calcul
- Lucrari Practice, Editura Printech 2009
Other references and more details and English language references in the resources page


-    course 
Rapid prototyping is a key issue of actual developments on the IT market. Reconfigurable computing architectures, emerged on the market as very convenient HPC (high performance computing platforms) as well as a conveninet solution to remove long prototyping times in traditional hardware (VLSI) design and to offer a better flexibility in hardware than is usually achieved in traditional programmable systems (e.g.  microcontrollers).
The aim of this course is to systematically present the most actual reconfigurable architectures (e.g. FPGAs CPLDs, FPAAs), their associated design tools as well as a design guide for the steps required to obtain a finite product using the reconfigurable technology. Focus is on computational aspects of these platforms.
During the course some specific applications (called next “case applications”) will be considered such that any new concept introduced during the course will be grounded and motivated by its necessity for the “case application”. 

-    applications 
Starting with 2020 - modern design instruments (including HLS) using VIVADO will be also consodered 
During the application sessions the most important aspects of designing with reconfigurable architectures will be introduced using development platforms from XESS (built around FPGAs from the Spartan II family) and software development tools such as Xilinx ISE. The last laboratory works consists on a full development cycle for the case applications, until the testing phase of the final product.